Project

General

Profile

support #466 » 0001-Feat-uart-configure-APB2-to-100MHz-for-921600.patch

未使用 - zhanbin lin, 05/26/2026 09:57 AM

View differences:

longan/brandy/brandy-2.0/u-boot-2018/drivers/clk/sunxi/clk-sun50iw10.c
sunxi_set_clk_priv_ops("dcxo_out", &dcxo_out_priv_ops,
set_dcxo_out_priv_ops);
sunxi_clk_factor_initlimits();
/* configure APB2 to 100MHz from pll_periph0 (600MHz / (3 * 2) = 100MHz) */
writel((0x3 << 24) | (0x1 << 8) | (0x2 << 0), sunxi_clk_base + APB2_CFG);
clk_register_fixed_rate(NULL, "hosc", NULL, CLK_IS_ROOT, 24000000);
longan/device/config/chips/a133/configs/c3/kickpi-k5c.dts
};
twi0: twi@0x05002000{
clock-frequency = <400000>;
clock-frequency = <200000>;
pinctrl-0 = <&twi0_pins_a>;
pinctrl-1 = <&twi0_pins_b>;
status = "okay";
longan/kernel/linux-4.9/drivers/clk/sunxi/clk-sun50iw10.c
set_dcxo_out_priv_ops);
/*do some initialize arguments here*/
sunxi_clk_factor_initlimits();
/* configure APB2 to 100MHz from pll_periph0 (600MHz / (3 * 2) = 100MHz) */
writel((0x3 << 24) | (0x1 << 8) | (0x2 << 0), sunxi_clk_base + APB2_CFG);
#ifdef CONFIG_PM_SLEEP
register_syscore_ops(&sunxi_clk_syscore_ops);
#endif
    (1-1/1)